A 400MHz ARM926-based embedded microprocessor with video playback, hardware encryption, DDR2 and LPDDR support, wide range of connectivity and user interface peripherals, and dual external bus interface.

The hardware video decoder supports multiple formats (H264, H263, MPEG4, MPEG2, VC1) in resolutions up to WVGA or D1 at 30fps. It includes graphics acceleration, such as scaling, rotation, color conversion and picture-in-picture.

The hardware encryption engine features AES 256-, 192-, 128-bit key algorithms compliant with FIPS PUB 197 Specifications, TDES two-key or three-key algorithms compliant with FIPS PUB 46-3 Specifications, a SHA Secure Hash Algorithm (SHA1 and SHA256) compliant with FIPS Publication 180-2 and a TRNG compliant with NIST SP800-22 and Diehard Random Tests suite.

The multi-layer bus architecture associated with 36 DMA channels and 64KB of SRAM tcan be configured as TCM, and the dual bus interface sustains the high bandwidth required by the processor and its high-speed peripherals.

It features multiple communication interfaces such as high speed USB host and device with transceivers, 10/100 Mbps Ethernet controller and a high-speed SDIO/MMC interface. It also comes with an LCD controller supporting up to 1280x860 resolution, a resistive touchscreen controller and a camera interface. The I/Os support 3.3V. The SAM9M11 is available in a BGA324 package with 0.8mm ball pitch.