| 参数 |
数值 |
| DAC Resolution (bits) |
0 |
| Crypto Engine |
No |
| SPI |
4 |
| Operating Voltage (Vcc) |
1.62 to 3.6 |
| Camera Interface |
No |
| Graphic LCD |
No |
| EEPROM (Bytes) |
0 |
| ADC Resolution (bits) |
12 |
| Flash (Kbytes) |
256 Kbytes |
| TWI (I2C) |
1 |
| MPU / MMU |
Yes / No |
| External Bus Interface |
1 |
| Input Capture Channels |
3 |
| FPU |
No |
| UART |
4 |
| Output Compare channels |
3 |
| SD / eMMC |
1 |
| picoPower |
No |
| 32kHz RTC |
Yes |
| I/O Supply Class |
1.8/3.3 |
| Video Decoder |
No |
| ADC channels |
8 |
| # of Touch Channels |
28 |
| Temp. Sensor |
No |
| Calibrated RC Oscillator |
Yes |
| Resistive Touch Screen |
No |
| CPU |
Cortex-M3 |
| Pin Count |
100 |
| Temp. Range (deg C) |
-40 to 85 |
| PWM Channels |
4 |
| SSC |
1 |
| DAC Channels |
0 |
| Quadrature Decoder Channels |
1 |
| Max I/O Pins |
57 |
| Hardware QTouch Acquisition |
No |
| Ext Interrupts |
57 |
| Self Program Memory |
YES |
| Timers |
3 |
| Max. Operating Frequency |
96 MHz |
| USB Speed |
Hi-Speed |
| DRAM Memory |
No |
| USB Interface |
Device |
| NAND Interface |
Yes |
| SRAM (Kbytes) |
50 |
| ADC Speed (ksps) |
384 |
| USB Transceiver |
1 |
| 系列 |
SAM3U |
| 核心处理器 |
ARM? Cortex-M3? |
| 芯体尺寸 |
32-Bit |
| 速度 |
96MHz |
| RAM容量 |
52K x 8 |
| 程序存储器类型 |
FLASH |
| 程序存储器容量 |
256KB (256K x 8) |
| 输入/输出数 |
57 |
| 振荡器型 |
Internal |
| 数据转换器 |
A/D 4x10b, 4x12b |
| 连通性 |
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB |
| 工作电压 |
1.65 V ~ 1.95 V |
| 工作温度 |
-40°C ~ 85°C |
| 周边设备 |
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT |
A member of the Atmel® SAM3U family of flash microcontrollers based on the high-performance 32-bit ARM® Cortex™-M3 RISC processor. It operates at a maximum speed of 96MHz and features 2x128KB of dual-bank Flash and 52KB of SRAM. The peripheral set includes a HS USB device and Phy at 480Mbps, HS multimedia card interface for SDIO/SD/MMC, a 16-bit external bus interface supporting NAND flash, three USARTs, TWI, four SPIs, I2S, four PWM timers, three 16-bit timers, RTC, 4x12-bit and four 10-bit ADC. The architecture is designed to sustain high-speed data transfers. The multi-layer bus matrix, multiple SRAM banks, PDC, and DMA support parallel tasks and maximize data throughput. The SAM3U4C operates from 1.62V to 3.6V and is available in 100-pin LQFP and BGA packages.
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