| Parameter | Value |
|---|---|
| Output Compare channels | 5 |
| Ext Interrupts | 6 |
| Operating Voltage (Vcc) | 1.8 to 5.5 |
| Analog Comparators | 1 |
| picoPower | No |
| USB Speed | No |
| ADC channels | 4 |
| TWI (I2C) | 1 |
| NAND Interface | No |
| FPU | No |
| DAC Resolution (bits) | 0 |
| Crypto Engine | No |
| Max I/O Pins | 6 |
| CPU | 8-bit AVR |
| Pin Count | 8 |
| Self Program Memory | YES |
| Camera Interface | No |
| Timers | 2 |
| Max. Operating Frequency | 20 MHz |
| I/O Supply Class | 1.8 to 5.5 |
| ADC Resolution (bits) | 10 |
| Video Decoder | No |
| Temp. Sensor | Yes |
| Input Capture Channels | 0 |
| Resistive Touch Screen | No |
| SPI | 1 |
| PWM Channels | 6 |
| EEPROM (Bytes) | 128 |
| # of Touch Channels | 4 |
| DRAM Memory | No |
| USB Interface | No |
| Calibrated RC Oscillator | Yes |
| Hardware QTouch Acquisition | No |
| Temp. Range (deg C) | -40 to 105 |
| Graphic LCD | No |
| 32kHz RTC | No |
| Flash (Kbytes) | 2 Kbytes |
| DAC Channels | 0 |
| MPU / MMU | no / no |
| SRAM (Kbytes) | 0.12 |
| ADC Speed (ksps) | 15 |
| External Bus Interface | 0 |
| 系列 | AVR® ATtiny |
| 核心处理器 | AVR |
| 芯体尺寸 | 8-Bit |
| 速度 | 10MHz |
| RAM容量 | 128 x 8 |
| 程序存储器类型 | FLASH |
| 程序存储器容量 | 2KB (2K x 8) |
| EEPROM 大小 | 128 x 8 |
| 输入/输出数 | 6 |
| 振荡器型 | Internal |
| 数据转换器 | A/D 4x10b |
| 连通性 | USI |
| 工作电压 | 1.8 V ~ 5.5 V |
| 工作温度 | -40°C ~ 85°C |
| 周边设备 | Brown-out Detect/Reset, POR, PWM, WDT |
The high-performance, low-power Atmel 8-bit AVR RISC-based microcontroller combines 2KB ISP flash memory, 128B EEPROM, 128B SRAM, 6 general purpose I/O lines, 32 general purpose working registers, one 8-bit timer/counter with compare modes, one 8-bit high speed timer/counter, USI, internal and external Interrupts, 4-channel 10-bit A/D converter, programmable watchdog timer with internal oscillator, three software selectable power saving modes, and debugWIRE for on-chip debugging. The device achieves a throughput of 20 MIPS at 20 MHz and operates between 2.7-5.5 volts.
By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per MHz, balancing power consumption and processing speed.
| No. | Description | |
|---|---|---|
| 1 |
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